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dsPIC30f2010 Microcontroller Board_Power Integrated

 

  • 6 PWM output channels.
  • Complementary or Independent OutputĀ  modes
  • Edge and Center Aligned modes
  • 4 duty cycle generators
  • Dedicated time base with 4 modes
  • Programmable output polarity
  • Dead time control for Complementary mode
  • Manual output control
  • Trigger for synchronized A/D conversions
  • Phase A, Phase B and Index Pulse input
  • 16-bit up/down position counter
  • Count direction status
  • Position Measurement (x2 and x4) mode
  • Programmable digital noise filters on inputs
  • Alternate 16-bit Timer/Counter mode

Description

High-Performance Modified RISC CPU:

  • Modified Harvard architecture
  • C compiler optimized instruction set architecture
  • 84 base instructions with flexible addressing modes
  • 24-bit wide instructions, 16-bit wide data path
  • 12 Kbytes on-chip Flash program space
  • 512 bytes on-chip data RAM
  • 1 Kbyte non-volatile data EEPROM
  • 16 x 16-bit working register array
  • Up to 30 MIPs operation.
  • DC to 40 MHz external clock input
  • 4 MHz-10 MHz oscillator input with
  • PLL active (4x, 8x, 16x)
  • 27 interrupt sources